1. Field of the Invention
The present invention relates to a semiconductor device, a method of manufacturing the same, and a camera.
2. Description of the Related Art
Concerning planarization using chemical mechanical polishing (CMP), there is known a problem of a difference in polishing speed, which is caused by unevenness of the density of a pattern formed on a surface to be planarized. This may greatly lower the planarity. In particular, local overpolishing called Edge Over Erosion (EOE) occurs at the boundary between a region with a high pattern density and a region with a low pattern density.
Japanese Patent Laid-Open No. 2006-100571 describes arranging dummy via hole plugs while gradually decreasing the dummy via hole plug density from a region where via hole plugs are formed.